State Charts
visualState
State machine design, test and implementation tool.
Key features
- Completely integrated development environment including a graphical designer, test tools, a code generator, and a documentation facility
- Graphical state machine design based on the Unified Modeling Language (UML) state machine subset
- Automatic code generation providing very compact C/C++ code, 100% compliant with the design
- Formal verification of the design model to find unwanted properties in the design, like dead-ends or unreachable states etc.
- Test and validation tools to ensure at an early stage of design that the application behaves as expected, even before the hardware exists
- Full integration with IAR Embedded Workbench enables true state machine debugging on hardware
- Ready-made project examples for various microcontrollers and evaluation boards
- Documenter to easily create up-to-date documentation of your project• Free-standing Viewer for sharing and discussing designs with stake holders outside the development team